Samsung sends Nvidia memory base die to TSMC's 3nm line

The base die is the logic chip that sits beneath stacked memory layers and manages them. According to the Seoul Economic Daily, Samsung builds standard HBM4 and HBM4E base dies in its own 4-nanometre foundry, and that turnkey model continues for other customers such as AMD. For NVHBM, unveiled in August 2026, Nvidia asked all 3 suppliers for TSMC's 3-nanometre process and a 6th-generation 1c DRAM core. The report calls it the first partnership between the two companies at the HBM manufacturing stage; earlier cooperation, about 4 years ago, went no further than packaging compatibility.

A 19 October roundup by The Next Web says NVHBM moves the memory controller from the graphics processor to the base die. The physical layer shrinks 60% against standard HBM, bandwidth rises by up to 30% and power draw falls 15%. Industry sources put TSMC's 3-nanometre yield above 90% and Samsung's 2-nanometre process at roughly 60%. Tech Monitor notes that this comparison sets different nodes against each other and that the figures are unverified.

Supply is tight. UBS expects HBM demand to rise 91% next year to about 61.5 billion gigabits while new supply stops at 54.6 billion gigabits, a gap of roughly 10%. TSMC is adding 2 new 3-nanometre lines at Fab 18 in Tainan, due onstream in 2027 and the first half of 2028. Samsung is also testing production of the NVHBM base die in its own foundry in case TSMC capacity proves insufficient. Counterpoint data reported by MoneyToday put second-quarter 2026 HBM revenue shares at 50% for SK hynix, 33% for Samsung and 18% for Micron.